Electronic components are packaged in order to interconnect them with other devices. The packaging of the electronic device usually includes contacts for transmitting signals and providing power and ground connections between the internal circuitry of the device and external circuitry. Some examples of prior art contacts include wire bonds protruding from the ends of a discrete diode or resistor, or metal caps located on the ends of a fuse. Sophisticated electronic devices such as microprocessors may require several hundred contacts. Those devices are usually produced in a package having multiple pins for mounting to a printed circuit. The electronic component is typically placed in a package, and each contact area on the electronic component is wire bonded to the corresponding pin on the package. Because each wire bond is individually added to the circuit, large numbers of contacts make wire bonding expensive. Additionally, because of the precision required for wire bonding, wire bonding may result in short circuits and similar problems. Furthermore, wire bonds can degrade chip performance because of the length of the wires.
One prior art method of solving the problems of wire bonds is the flip chip. Solder balls act as attachment material that allows the flip chip to be attached to a substrate or circuit board. The silicon of the flip chip usually has a different coefficient of thermal expansion (CTE) than that of the substrate or circuit board. The CTE for the flip chip can be as low as 3 parts per million (PPM) while the substrate or circuit board (as well as the solder balls) can be in the range of 18-22 PPM. As a result of the CTE mismatch, the chip and substrate or circuit board expand and contract at different rates due to thermal cycling. A lack of compliance in the contact area can cause failures. Attempts to solve the CTE mismatch have included introducing large volumes of solder. This is contrary, however, to the desires of the market for electronic packaging for smaller, cheaper, and faster components. For example, in U.S. Pat. No. 6,441,487, the inventors specify a minimum sized solder ball that is 229 um (0.009″) as a means of improving reliability. The market is seeking the ability to use solder balls smaller than 100 um (0.004″).
U.S. Pat. No. 4,673,967 presented a plastic leaded chip carrier (PLCC) with J-shaped device leads soldered to respective portions of circuit pads on a printed circuit board to minimize space, dissipate heat, and provide some compliancy to a dual in-line package (DIP) for integrated circuits. This PLCC requires a multitude of manufacturing steps, however, such as wire bonding, which includes the complications discussed above, and results in a relatively large package.
U.S. Pat. No. 6,221,751 presented a circuit package which addressed CTE mismatch by providing lead connections that are not directly on the surface of the die, but instead formed on posts composed of an encapsulant material. This allows for some compliancy and smaller bond pads or junction areas on the die and thus minimizes the stress on the die surface. Nevertheless, greater flexibility and compliancy is still desired.